
EC-CouncilIoT Security Essentials
Domain 2Objective 1
IoT Hardware Devices and Processors ISE Practice Questions (Page 4)
Part of the IoT Hardware and Platforms domain, which makes up ~18% of our current practice bank. EC-Council does not publish an official question count, but from its 120-minute exam (~50–80 total, ~9–14 in this domain), expect 2–4 from this objective — we provide 48 practice questions to prepare you well beyond it. (estimate)
48questions here
10free pages
9concepts
Questions 16–20
- 16
A team is developing a battery-powered asset tracker that must transmit its location every 5 minutes. The device uses a Cortex-M0+ microcontroller and a cellular modem. The average current draw in active mode is 50 mA for 2 seconds per transmission, and in sleep mode it is 10 µA. The battery has a capacity of 1000 mAh. Which strategy most effectively extends battery life?
Select an answer first - 17
Which processor architecture is most commonly associated with low-power, microcontroller-based IoT devices such as smart sensors and wearables?
Select an answer first - 18
A company is designing a battery-powered environmental sensor that must run for two years on a single coin-cell battery. The device wakes every 15 minutes, reads temperature and humidity, and transmits a short packet over a low-power radio. The team is choosing between an ARM Cortex-M0+ microcontroller and an ARM Cortex-A7 microprocessor. Which factor is the primary reason to choose the Cortex-M0+?
Select an answer first - 19
A company is developing a solar-powered environmental sensor that must operate through several days of cloudy weather. The device uses an ARM Cortex-M4 microcontroller and a LoRa radio. The power budget is extremely tight. Which power management strategy is most effective?
Select an answer first - 20
A design team is building a wearable health monitor that must read data from three sensors: a temperature sensor, an accelerometer, and a heart-rate sensor. The microcontroller has limited GPIO pins. The sensors support both I2C and SPI interfaces. Which interface choice is most appropriate to minimize pin usage?
Select an answer first
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